The process breaks down into two general categories, Front End sequential and Back End concurrent processing.
Step one in the Front End is the Logic Synthesis steps which map out all of the gates that will be wire-bonded to one another. The logic gates start at their digital wire-bonds (or pins) and go through their p-wells to their power planes, ground plane, high voltage wiring backplane connections, and finally external programmable inputs connectors. Logic Synthesis is done by software algorithms executing on an FPGA (Field Programmable Gate Array). This provides Board Level engineers with both a means to simulate how many thousands or millions of logic gates will behave before any wafers enter fabrication.
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